The invention relates to a device for processing digital data, comprising a memory and detection means for detecting errors in the digital data, and also relates to a digital video system comprising a video input, a video output, a video processor, a DCT circuit, a variable-length encoder-decoder circuit, a modulator-demodulator circuit, at least one read/write head, and also comprising a device.
A device and a digital video system of the kind set forth are known from European Patent Application 0 398 651 A2, which describes a device in which digital data is written into a memory, after which an error correction and detection circuit corrects errors, if possible, and supplies a detection signal on the basis of which the data stored in the memory is read, or not, for supply to a frame memory. The write operation in the frame memory is interrupted when the number of errors detected per frame exceeds a given threshold value. The same data is then read again from the frame memory. Drawbacks of such a device reside in the fact that the data is to be transferred from one memory to the other memory, requiring numerous addressing operations, and that the memories comprise a multitude of connection pins which impedes integration of the device on an IC. In another embodiment of the device described in said Application, the data is applied to the frame memory via a series-parallel converter, the write operation in the frame memory again being interrupted when an excessive number of errors has been detected. The circuit used therein is very complex.